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How to fix Asrock c2750d4i with C2000 bug

Constantin

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May 19, 2017
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I wonder whether the 25MHz signal could be externally generated on a daughter board that plugs into the TPMI header, then cut the pcb trace next to the cpu, if it is accessible? Unfortunately, chances are this is a 6+ layer PCB. But hope springs eternal.
 

Marcy20

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Jun 22, 2021
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So my board came back from the RMA. there was a new one despite the fact that it was produced in 2014. However, now I have a problem with Truenas 12 U4. CPU stats doesn't show up correctly
 

Samuel Tai

Never underestimate your own stupidity
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dreamerns

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May 1, 2015
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Hi there,
I have the same problem. I returned my board 4x for RMA and now the fifth might be saying goodbye to this unreliable garbage. But just before I throw it into trashcan I decided to check on the forum if there is some revive solution. I don't know which type of failure is this time. I can log in to IPMI, but when I start there is no post, the monitor is blank, nothing happens except that BMC led blinking green.
Thanks
 

Constantin

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I’d try the proposed solutions that have worked for others. You literally have nothing to lose.
 

bfarnam

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Nov 3, 2021
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So I have a spare C2750D4I which apparently had a MFG Board Level Repair done. It is actually quite different from what is described here in this post. I have confirmed it is a B0 stepping CPU by checking the S number.

I tried to RMA it and they denied it as out of warranty with no repair option.

I am going to put my OScope on it later and see what I have. I will post more later on the results and the specifics of the MFG Board Repairs.
 

bfarnam

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Nov 3, 2021
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I have updated my thread over on STH... so I am not duplicating my efforts you can access it here:
https://forums.servethehome.com/index.php?threads/bug-in-intel-atom-c2000-series-processors.13173/

In essence this board appears to have had a "factory platform" fix which entailed "pulling up" ALL the timers on the CPU. I can confirm the LPC (Low Pin Count) Clock 0 and 1. The pull up was done with 120 ohm resistors to 3.3v which measures out on my mobo at 3.46v.

LPC Clock 0 and LPC Clock 1 are labeled as LAD 0 and LAD 1 at the TPMS header. Also LAD 3, LAD 4, and the PCI_CLK were pulled up at the TPMS. There were one, possibly 2, resistors added UNDER the CPU on the backside as well.
 

cfcaballero

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Nov 26, 2017
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45
Thanks so much for this post! (I can't seem to @mention you, though, OP).

I have a similar situation with my 2014 vintage C2750D4I having died in 2020 when I couldn't reach it. Now that I have my mitts on it, I put the oscilloscope probe on that PCICLK pin and I get what looks like open circuit. I can login to the BMC no problem, V0.35 like many others.

What should that pin look like before the resistor fix? Should it be a 33MHz square wave, just with the p2p voltage too low, or something else?

Thanks again, and once more in advance to you or anyone else that can answer and help me decide whether I should try and salvage this mobo.
 

Ericloewe

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What should that pin look like before the resistor fix? Should it be a 33MHz square wave, just with the p2p voltage too low, or something else?
A clean signal would be a square wave. The frequency is less than fully clear: LPC nominally runs at 33 MHz, but Intel seems to have switched at least some chipsets to running it at 25 MHz.
Edit: The C2000 datasheets apparently do state 25 MHz.
(As nearly everything has moved off the LPC by now, bandwidth requirements are close to zero. I suspect that 25 MHz is marginally easier to generate from the 100 MHz base clock.). My C2758 measures at 25 MHz.
 
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Ericloewe

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Fake second edit: It turns out that C2000 can be configured for either 25 MHz (default) or 33 MHz. Or maybe not? This whole thing is confusing the hell out of me.

Edit to the fake edit: I get the feeling that it's actually the FLEX_CLK_SE0 pin that's being used for LPC clocks. That one supports 33 MHz, the LPC Clocks proper don't. Has anyone actually measured the frequency of the LPC clock on the ASRock C2x50D4I boards?
 
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Al Fuller

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Aug 11, 2015
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Fake second edit: It turns out that C2000 can be configured for either 25 MHz (default) or 33 MHz. Or maybe not? This whole thing is confusing the hell out of me.

Edit to the fake edit: I get the feeling that it's actually the FLEX_CLK_SE0 pin that's being used for LPC clocks. That one supports 33 MHz, the LPC Clocks proper don't. Has anyone actually measured the frequency of the LPC clock on the ASRock C2x50D4I boards?
All: I have a FreeNAS mini that has the ASRock C2750D4I board, and it has died... I have tried to follow this thread, and even soldered together the resistors as indicated above in an effort to get the server back up - to no avail. As I have been trying to educate myself on what motherboards are available, this has still bothered me: I understand the issue to be that we need 3.3v on the PCICLK pin on the TPM header, but it is degraded.

The fix suggested is to take +3v from another pin on the TPM header, apply two resisters to make a voltage divider, and connect to the PCICLK pin.

It seems to me that we are trying to fabricate a power supply for this use case, and there is a perfectly good power supply already present that [conveniently] supplies 3.3v on one of the cables. Am I missing something, or can't we just pick off that 3.3v and use it? Thanks in advnce for your thoughts.
 

Ericloewe

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It seems to me that we are trying to fabricate a power supply for this use case
More subtle than that: A hard pull-up. Shorting to +3.3V would, at best, result in the bus staying high all the time, which isn't useful. At worst, it would burn out the CPU entirely.

General consensus is that, for whatever manufacturing reason, the high side of the totem pole output driver on the CPU dies, while the low side keeps working. Adding a hard pull-up allows the low-side driver to (with some effort...) pull down the bus line to the low logic level.
 

Al Fuller

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More subtle than that: A hard pull-up. Shorting to +3.3V would, at best, result in the bus staying high all the time, which isn't useful. At worst, it would burn out the CPU entirely.

General consensus is that, for whatever manufacturing reason, the high side of the totem pole output driver on the CPU dies, while the low side keeps working. Adding a hard pull-up allows the low-side driver to (with some effort...) pull down the bus line to the low logic level.
OK, thanks for the reply. I guess I understand better now why anyone / everyone didn't just go that route...
 
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