FreeNAS/TrueNAS Mini XL+ Memory RAS Features

[CubicSphere]

FreeNAS/TrueNAS Mini XL+ uses Intel C3758 CPU which, according to the Intel website, has ECC support and some unspecified RAS features.

Would it be possible to setup the Mini XL+ box to use memory mirroring or some other memory RAS features (e.g. SDDC) in addition to standard ECC?

I understand that that would degrade memory performance somewhat, but I believe it's not as important for file storage...

 

[morganL]

No....ECC is fine. It would be very rare that it gets used, but when it does, it saves your data from corruption.

Memory mirroring is for large machines with TBytes of RAM where a DIMM failure would cause an unacceptable outage. The whole system is typically designed for hot-swap and high availability.

The Mini machines don't have this problem with small number of DIMMs. Other failures (particularly power with single power supply and single feed) are much more likely to cause outages. If you need 99.999% reliability, the redundant TrueNAS X-Series would meet this requirement, but you'll also need dual power feeds.

 

[CubicSphere]

Thanks for the reply, morganL.

I'm thinking more about data integrity (since it's in RAM at some point), rather than system uptime for which, I agree, a distributed storage system is the best solution. I realized after posting that actually memory mirroring wouldn't make data integrity problems any better. What would work is something like Intel's SDDC where multi bit errors within a single DIMM chip can be corrected or some form of actual lockstep.

I've checked with iXsystems support as well and they clarified that the motherboard used in Mini XL+ is Supermicro A2SDi-H-TF, Rev. 1.10, which does not support any of these RAS features. Nor do Intel Atom CPUs it seems.

Thinking about it logically, the most likely time when the data can get corrupted in memory is in the process of being written and that risk can be mitigated by reading back the data and making sure it matches what was written. If the memory gets corrupted during or between ZFS scrubs, the probability of a checksum mismatch and RAM data corruption at the same time is very low.

Regardless, if I can use some kind of multi bit error detection and correction, I'd love to use it.

 

[morganL]

Thanks for the reply, morganL.

I'm thinking more about data integrity (since it's in RAM at some point), rather than system uptime for which, I agree, a distributed storage system is the best solution. I realized after posting that actually memory mirroring wouldn't make data integrity problems any better. What would work is something like Intel's SDDC where multi bit errors within a single DIMM chip can be corrected or some form of actual lockstep.

I've checked with iXsystems support as well and they clarified that the motherboard used in Mini XL+ is Supermicro A2SDi-H-TF, Rev. 1.10, which does not support any of these RAS features. Nor do Intel Atom CPUs it seems.

Thinking about it logically, the most likely time when the data can get corrupted in memory is in the process of being written and that risk can be mitigated by reading back the data and making sure it matches what was written. If the memory gets corrupted during or between ZFS scrubs, the probability of a checksum mismatch and RAM data corruption at the same time is very low.

Regardless, if I can use some kind of multi bit error detection and correction, I'd love to use it.

ECC RAM is single bit error correction.. and finds nearly all multibit errors. That covers 99.999% of the problems....