Why NVMe SSDs are the best thing since sliced bread

[TrumanHW]

With Optane going the way of the dinosaur, it's really just NAND at the end of the day in this market. Sure, there's QLC,TLC,MLC,SLC and whatever other crazy inventions to store exponentially higher quantities of voltage states. But it's all NAND. Sure there are some variations in controllers, and embedded DRAM, SLC caching, etc. But NAND is only one form of flash, and really, it's the only "flash" in enterprise storage now.


PCI-E Re-timers, PLX switch chips, PCI-E "Host Bus Adapters", CXL, etc, etc all exist to solve the distance issue. PCI-E over a fabric is here, you can be several racks away, in the future probably several miles away. So, I'm not understanding the argument here?

Everytime I glance at this thread and see that remark about ... "Optane going the way of the dinosaur" I get a little sad.

You really think Intel and Micron are both completely done taking advantage of that technology ..?
I mean ... I guess I'll still be able to buy p5800 at progressively cheaper prices (I hope) as they come off lease. Esp given their endurance.

 

[NickF]

Micron bailed 18 months before Intel dumped it. It's kinda funny and sad that AMD EPYC and Ryzen stealing market share killed off Optane and made Pat Gelsinger sell off the NAND business too. I loved even Intel NAND, let alone just Optane.

As a big PCPER fan, I take solace only in the fact Alvyn Malventano wound up at Solidigm. RIP

Samsung 840 / 840 EVO TLC Read Speed Degradation Issue Discussion

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Solidigm: The Scrappy 800lb Storage Gorilla Coming For Your SSD ft. Allyn Malventano

Allyn stops by the Level1 Zone (that's what we're calling it now) to show off Solidigm's dope new software!Allyn Malventano's Twitter: @malventanoP44 Pro: ‎h...

youtu.be

 

[TrumanHW]

Micron bailed 18 months before Intel dumped it. It's kinda funny and sad that AMD EPYC and Ryzen stealing market share killed off Optane and made Pat Gelsinger sell off the NAND business too. I loved even Intel NAND, let alone just Optane.

As a big PCPER fan, I take solace only in the fact Alvyn Malventano wound up at Solidigm. RIP

Samsung 840 / 840 EVO TLC Read Speed Degradation Issue Discussion

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Solidigm: The Scrappy 800lb Storage Gorilla Coming For Your SSD ft. Allyn Malventano

Allyn stops by the Level1 Zone (that's what we're calling it now) to show off Solidigm's dope new software!Allyn Malventano's Twitter: @malventanoP44 Pro: ‎h...

youtu.be

Yyyyup. But apparently Solidigm (the people from Intel NAND) make outstanding SSD. I doubt they got Intel's IP..!
But, I'll probably be one of those guys ignorant that newer tech is better gobbling up a buncha p5800x 3.2TB once cheap. :)

 

[asap2go]

Me either. My point is that stuff like a SAS HBA represents a significant additional hop for the data; if you can eliminate a controller, that's great. The HBA controller represents a little PowerPC CPU core that is busily servicing all the ports. This is not going to be fast.

The point here is that there are a few ways to handle data. Let's consider ethernet switches.

Basic switches do what is known as store-and-forward. They receive a frame, look at it, determine what port it is destined for, and then add it to the queue for that port. This adds a small delay to the packet.

But more expensive switches have the ability to do something known as cut-through forwarding, where the switch silicon starts analyzing the packet AS IT ARRIVES on the port, without waiting for the complete frame to arrive. The switch makes a decision about where to send the packet and then (assuming the port is free) begins cramming the packet out the egress port, so the data is literally exiting the switch while still being received. This adds a much smaller delay to the packet but you lose certain error recovery features and also it's a problem if the outgoing port is busy.

But the best option is to get rid of the switch; straight thru wins every time. If you do not have an engineering need for the intermediate hop, get rid of it!

So in many ways SAS is like a store-and-forward switch, it is hugely reliable, well-understood, cheap, scalable, and very common. But you end up going through that HBA which adds latency.

PCIe architectures only scale so far and there have been innovations such as PLX switches, which I consider to be akin to cut-through switches. They add some delay but they are extremely effective at increasing the capability of your overall system. The PLX switch is relatively low latency (compared to an HBA).

But of course you can just get rid of all of it. NVMe direct to CPU is really as good as it gets. This is a real winner. If you don't need a PLX or HBA in there, why have it!

A NVME SSD comes with an incredible amount of complexity in its controller. Writes are append only, Trimming, multilevel caching, and many more.
There are even new enterprise concepts that aim to just provide NAND Flash drives without controllers and manage the controller part as a centralized software stack for better scaling.
There is a reason why we don't see 8TB nvme SSDs in the consumer space.

Here is an Interview about the reasoning behind that:

Pure Storage's Flash with Justin Emerson

Wendell and Justin delve into the science of flash memory and the innovation that Pure Storage is pioneering! How does it compare with Hard Drives? How does ...

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[jgreco]

A NVME SSD comes with an incredible amount of complexity in its controller. Writes are append only, Trimming, multilevel caching, and many more.

So what? I'm arguing that if you eliminate hubs/switches/HBA's/controllers, you reduce the number of times you handle the data, which reduces latency.

There are even new enterprise concepts that aim to just provide NAND Flash drives without controllers and manage the controller part as a centralized software stack for better scaling.

Yes, that's my point. You can eliminate some of the crap in between the CPU and the flash.

 

[asap2go]

So what? I'm arguing that if you eliminate hubs/switches/HBA's/controllers, you reduce the number of times you handle the data, which reduces latency.



Yes, that's my point. You can eliminate some of the crap in between the CPU and the flash.

I understand. Just wanted to say that there is a lot more that could be eliminated if we had bare flash chips and a software stack to address it directly.

 

[NickF]

I understand. Just wanted to say that there is a lot more that could be eliminated if we had bare flash chips and a software stack to address it directly.

I had a Pure M20 that I upgraded to a X20 about a year ago. I moved from traditional SAS-based SSDs to NVME-based SSDs. I can tell you definitively that Pure's NVME drives still have controllers on them. Don't let the marketing fool you.
The theoretical discussion should not be confused with the reality of their product stack as it is today.

 

[asap2go]

You still need one because a flash cell can't communicate with the CPU on its own. But it can be a lot simpler.
I just posted the Interview because I found the concept interesting. I have no idea about the actual implementation nor did I intend to endorse the product.