 eax in    eax      ebx      ecx      edx
00000000 00000001 68747541 444d4163 69746e65
00000001 00040f33 01020800 00002001 178bfbff
80000000 80000018 68747541 444d4163 69746e65
80000001 00040f33 000009a3 0000001f ebd3fbff
80000002 20444d41 6c687441 74286e6f 3620296d
80000003 32582034 61754420 6f43206c 50206572
80000004 65636f72 726f7373 30303620 00002b30
80000005 ff08ff08 ff20ff20 40020140 40020140
80000006 00000000 42004200 04008140 00000000
80000007 00000000 00000000 00000000 0000003f
80000008 00003028 00000000 00000001 00000000
80000009 00000000 00000000 00000000 00000000
8000000a 00000001 00000040 00000000 00000000
8000000b 00000000 00000000 00000000 00000000
8000000c 00000000 00000000 00000000 00000000
8000000d 00000000 00000000 00000000 00000000
8000000e 00000000 00000000 00000000 00000000
8000000f 00000000 00000000 00000000 00000000
80000010 00000000 00000000 00000000 00000000
80000011 00000000 00000000 00000000 00000000
80000012 00000000 00000000 00000000 00000000
80000013 00000000 00000000 00000000 00000000
80000014 00000000 00000000 00000000 00000000
80000015 00000000 00000000 00000000 00000000
80000016 00000000 00000000 00000000 00000000
80000017 00000000 00000000 00000000 00000000
80000018 00000000 00000000 00000000 00000000

Vendor ID: "AuthenticAMD"; CPUID level 1

AMD-specific functions
Version 00040f33:
Family: 15 Model: 3 []

Standard feature flags 178bfbff:
FPU    Floating Point Unit
VME    Virtual 8086 Mode Enhancements
DE     Debugging Extensions
PSE    Page Size Extensions
TSC    Time Stamp Counter
MSR    Model Specific Registers
PAE    Physical Address Extension
MCE    Machine Check Exception
CX8    COMPXCHG8B Instruction
APIC   On-chip Advanced Programmable Interrupt Controller present and enabled
SEP    Fast System Call
MTRR   Memory Type Range Registers
PGE    PTE Global Flag
MCA    Machine Check Architecture
CMOV   Conditional Move and Compare Instructions
PAT    Page Attribute Table
PSE36  36-bit Page Size Extension
CLFSH  CLFLUSH instruction
MMX    MMX instruction set
FXSR   Fast FP/MMX Streaming SIMD Extensions save/restore
SSE    SSE extensions
SSE2   SSE2 extensions
HTT    Hyper-Threading Technology
Generation: 15 Model: 3
Extended feature flags ebd3fbff:
FPU    Floating Point Unit
VME    Virtual 8086 Mode Enhancements
DE     Debugging Extensions
PSE    Page Size Extensions
TSC    Time Stamp Counter
MSR    Model Specific Registers
PAE    Physical Address Extension
MCE    Machine Check Exception
CX8    COMPXCHG8B Instruction
APIC   On-chip Advanced Programmable Interrupt Controller present and enabled
SEP    Fast System Call
MTRR   Memory Type Range Registers
PGE    PTE Global Flag
MCA    Machine Check Architecture
CMOV   Conditional Move and Compare Instructions
PAT    Page Attribute Table
PSE36  36-bit Page Size Extension
NX     No-execute page protection
MmxExt MMX instruction extensions
MMX    MMX instructions
FXSR   Fast FP/MMX Streaming SIMD Extensions save/restore
FFXSR  FXSAVE and FXRSTOR instruction optimizations
RDTSCP RDTSCP instruction
LM     64 bit long mode
3DNowE 3DNow! instruction extensions
3DNow  3DNow! instructions

Extended Miscellaneous feature flags 0000001f:
LhfSaf LAHF and SAHF instructions in 65-bit mode
CmpLeg Core Multi-Processing mode
SVM    Secure Virtual Machine
XAPSPC Extended APIC Register Space
AltMC8 LOCK MOV CR0 means MOV CR8

Processor name string: AMD Athlon(tm) 64 X2 Dual Core Processor 6000+
L1 Cache Information:
2/4-MB Pages:
   Data TLB: associativity 255-way #entries 8
   Instruction TLB: associativity 255-way #entries 8
4-KB Pages:
   Data TLB: associativity 255-way #entries 32
   Instruction TLB: associativity 255-way #entries 32
L1 Data cache:
   size 64 KB associativity 2-way lines per tag 1 line size 64
L1 Instruction cache:
   size 64 KB associativity 2-way lines per tag 1 line size 64

L2 Cache Information:
2/4-MB Pages:
   Data TLB: associativity L2 off #entries 0
   Instruction TLB: associativity L2 off #entries 0
4-KB Pages:
   Data TLB: associativity 2-way #entries 0
   Instruction TLB: associativity 2-way #entries 0
   size 4 KB associativity L2 off lines per tag 129 line size 64

Advanced Power Management Feature Flags
Has temperature sensing diode
Supports Frequency ID control
Supports Voltage ID control
Maximum linear address: 48; maximum phys address 40
